GIDE - The Generic Z80 IDE Interface ==================================== (C) 1995 Tilmann Reh Technical Documentation State 19951012 1. Introduction The GIDE is a generic IDE interface for Z80 based computers. It allows for connecting a maximum of two IDE devices like hard disk or CD-ROM to such computers. Optionally, it also contains a real-time-clock (RTC, Seiko-Epson 72421) which can be battery-backed. The interface board is powered by the target computer, and draws so little current that it can be expected to work with really every Z80 computer. The interface is accessed via I/O instructions, with a jumper-selectable base address. 2. Mounting considerations The board size of GIDE is 58 by 75 mm (2.3 by 3 inch). There are three mounting options for the board, of which one can be chosen to match the particular target computer. These options are: 2.1 Standard mounting When the target's Z80 processor is socketed, and there is sufficient space around and above the socket, the processor chip is removed from its socket and plugged into the socket on the GIDE board (CN1). This board is then plugged into the target's socket as a daughterboard (using CN2). The interface board extends about 10 mm (0.4") to the 21-40 row, and about 50 mm (2") to the 1-20 row of the processor socket in the motherboard. At both short sides of the socket, only 5 mm (0.2") space is required. 2.2 Cable mounting If the target's processor is socketed, but there is no sufficient space for plugging the GIDE into the processor socket, this option applies. The processor is removed from the computer and plugged into the GIDE (CN1). Then an IDC cable is used to connect the target's processor socket with the GIDE board (using CN4 then instead of CN2). The GIDE board should be fixed with screws when this option is used. The connecting cable should be AS SHORT AS POSSIBLE. 2.3 Cable mounting without processor If the target's processor is soldered in, there is a third mounting option which does not require the processor to be soldered out and socketed (that, however, should also be considered). One can solder a socket onto the processor, and connect it with the GIDE as with the previous option (via IDC cable). When this mounting option is used, solder jumper J3 must be changed to position A (it is preconnected to B on the PCB). For some target computers, a change must be made to the target's motherboard, with a flying lead connected to the GIDE. For this reason, the mounting options with the processor on the GIDE board are to be preferred. For details of the motherboard patch, see below (circuit description). 2.4 If the host computer uses a DMA chip... ... then this might cause a signal collision when the DMA chip becomes active. The masked read signal output /RDQ is not disabled during DMA cycles, so the DMA will "fight" against the GAL output (and normally will be the weaker one). In most cases, the problem can be solved by changing the position of solder jumper J3 as described above. If the interface board is plugged in directly, the trace which leads to pin 21 of the host socket must be cut and that pin connected to the CPU signal /RD directly. 3. Circuit options For use as IDE interface only, the RTC section needs not to be assembled. This concerns the RTC chip (IC5), and its supply circuit (D2, D3, J2). If the RTC is assembled, but shall not be battery backed, replace D2 by a wire, and omit D3 and J2. However note that even if the RTC is not assembled, it's I/O address is occupied by the GIDE. For use with an external IDE expansion board (yet to be designed, and perhaps never available), the address decoder GAL might be replaced by a 22V10 type which features an additional decoded address output. This decoded select signal is supplied to pin 20 of the IDE connector, which normally is not existent by the IDE definition. The signal is fed through a resistor to prevent short circuits in case it is connected to ground. 4. Circuit description The circuit can be divided in several functional blocks. The first block to be mentioned here is the address decoder, which is made of a GAL 20V8 (IC2). It compares the address lines A4 to A7 with the values given by the base address jumpers (J1), and decodes all needed select signals within the selected address area. It also buffers address lines A0 to A2 for the IDE port. The second functional block is the IDE access state machine. Consisting of a GAL 16V8 (IC1) and two bidirectional 8-bit registers (IC3, IC4), this block handles data transfer between the Z80 and the IDE device. Main purpose of this block is to interface between the 16-bit data transfers of the IDE device and the 8-bit accesses of the Z80 processor. For data accesses, one half of each 16-bit data word is stored in one of the registers until the next 16-bit access can be made. Since this occupies only one I/O address of the Z80, data transfer can be done using block I/O instructions (INIR/OTIR). The state machine GAL also provides access strobe signals for the IDE devices, and a masked /RD signal for the target computer. So here are the details which have to be considered when using the mounting option with soldered-in processor: If the circuit of the target computer uses a data buffer which is directly connected to the processor, and the transfer direction of this data buffer is switched by the /RD signal regardless of the I/O address, a data bus collision will occur when the GIDE is accessed. To avoid this, the /RD line at the processor must be cut, and the /RDQ signal of the GIDE board must be fed into the computer's circuit instead of /RD. Remember this applies only to the third mounting option, since otherwise the /RDQ signal is already fed into the computer's processor socket. The third and last functional block is the RTC block. This is a really straightforward I/O device, which is simply connected to the data bus and provided with a properly decoded select signal. The /RESET signal is connected to CS1 to inhibit RTC accesses during power-up or instable power supply conditions. Address lines A8 to A11 are used to select the sixteen RTC registers, so there is only one I/O port address needed to access the RTC. However, accessing the RTC must be done using indexed I/O instructions (like OUT (C),r or IN r,(C)) with the register address in the B register which is output on the higher address lines then. 5. Part list IC1 1 GAL 16V8 Q25 IC2 1 GAL 20V8 Q25 IC3,IC4 2 74 HCT 646 IC5 1 RTC 72421 (optional) D1 1 LED 3mm red D2,D3 2 1 N 4148 (optional) R1 1 330 R R2 1 1 k R3 1 1 k (optional) RN1 1 SIL resistor array 4x 10k (5 pins) CK1 1 10 æF 16V Ta. CK2,CK3 2 100 nF cer. CK4 1 100 nF cer. (optional) CN1 1 40-pin milled DIP socket CN2 2 20-pin milled SIP stripes CN3 1 40-pin header CN4 1 40-pin header (optional) J1 1 8-pin header with up to 4 jumpers J2 1 3-pin header (battery, optional) J3 - solder jumper (see text) - 3 24-pin milled DIP socket - 1 20-pin milled DIP socket - 1 18-pin milled DIP socket (optional) 6. Programming details For using the GIDE, we need some software. That software will have to access the particular I/O addresses which are used, so here we are (all addresses are in hexadecimal notation): Occupied I/O addresses: x4 reserved for IDE expansion board x5 RTC access x6 IDE alternate status / digital output register x7 IDE drive address register x8 IDE data register x9 IDE error/feature register xA IDE sector count register xB IDE sector number register xC IDE cylinder low register xD IDE cylinder high register xE IDE drive/head register xF IDE command/status register Wherein "x" represents the base address selected by J1. A plugged-on jumper sets the according address bit to zero, while removing a jumper sets it to a one. It should be noted that addresses x0 to x3 are not used at all - there will be no conflicts if any other I/O devices use these four addresses. A detailed description of the IDE registers and commands is given in my article series in TCJ, or in the "ATA Interface Reference Manual" available from Seagate and other manufacturers. The sixteen RTC registers are accessed by 16-bit I/O instructions, using the following addressing scheme: y0x5 seconds, units y1x5 seconds, tens y2x5 minutes, units y3x5 minutes, tens y4x5 hours, units y5x5 hours, tens & AM/PM flag y6x5 day, units y7x5 day, tens y8x5 month, units y9x5 month, tens yAx5 year, units yBx5 year, tens yCx5 day of week yDx5 control register D (status/control) yEx5 control register E (pulse output control) yFx5 control register F (master control) Wherein "x" represents the jumper selectable base address, and "y" is a "don't care". Each RTC register consists of 4 bits only, so the highermost four data bits are ignored during RTC writes and undefined during RTC reads. 7. Programming examples For easy implementation in any target computer, some program examples are provided to show how to access the IDE devices and the RTC in Z80 assembly language. They are given for information purpose only, and might not operate perfectly in all environments. Three sample routines are given for both IDE and RTC access: the initialisation routine, and routines for reading resp. writing data. For ease of use, the programming examples are provided in extra program files which can directly be edited and used. For the IDE hard disk sample driver, see the file GIDEIDE.MAC; for the RTC sample driver, see GIDERTC.MAC. For first tests with a freshly connected IDE hard disk drive, the test program GIDETEST is provided which allows for some basic operational test of interface and drive. The program is written in Turbo-Pascal 3.0 and provided in both source and object code. Note that the program may be freely distributed, but only in the original, unchanged version! ----- EOF -----